Dataset for: Effective Logic Synthesis Flow for Threshold Logic Circuit Design
| Main Author: | Matos, Jody Maick |
|---|---|
| Other Authors: | Neutzling, Augusto, Mishchenko, Alan, Reis, Andre, Ribas, Renato |
| Format: | Dataset |
| Terbitan: |
Mendeley
, 2017
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| Subjects: | |
| Online Access: |
https:/data.mendeley.com/datasets/ypvc8p99cb |