Matos, J. M., Neutzling, A., Mishchenko, A., Reis, A., & Ribas, R. (2017). Dataset for: Effective Logic Synthesis Flow for Threshold Logic Circuit Design. Mendeley.
Chicago Style CitationMatos, Jody Maick, Augusto Neutzling, Alan Mishchenko, Andre Reis, and Renato Ribas. Dataset For: Effective Logic Synthesis Flow for Threshold Logic Circuit Design. Mendeley, 2017.
MLA CitationMatos, Jody Maick, et al. Dataset For: Effective Logic Synthesis Flow for Threshold Logic Circuit Design. Mendeley, 2017.
Warning: These citations may not always be 100% accurate.