An Efficient Architecture of Vedic Multiplier using FinFet Based Pass Transistor Logic
| Main Authors: | B.Paulchamy, K.Kalpana, J.Jaya |
|---|---|
| Other Authors: | Blue Eyes Intelligence Engineering & Sciences Publication (BEIESP) |
| Format: | Article Journal |
| Bahasa: | eng |
| Terbitan: |
, 2020
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/5582455 |
| Description not available. |