On-chip Generation of Functional Tests with Reduced Delay and Power
| Main Authors: | Kumar Motamarri, Hemanth; University college of Engineering, JNTUK, Kumari, B. Leela; University college of Engineering, JNTUK |
|---|---|
| Format: | Article info application/pdf eJournal |
| Bahasa: | eng |
| Terbitan: |
Institute of Advanced Engineering and Science
, 2017
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| Subjects: | |
| Online Access: |
http://journal.portalgaruda.org/index.php/EEI/article/view/570 http://journal.portalgaruda.org/index.php/EEI/article/view/570/892 |
Internet
http://journal.portalgaruda.org/index.php/EEI/article/view/570http://journal.portalgaruda.org/index.php/EEI/article/view/570/892
Lokasi
| Koleksi | Bulletin of Electrical Engineering and Informatics |
|---|---|
| Gedung | IAES Indonesia Section and Partners |
| Institusi | IAES Indonesia Section and Partners |
| Kota | KOTA YOGYAKARTA |
| Provinsi | DAERAH ISTIMEWA YOGYAKARTA |
| Kontak | Butuh informasi lebih lanjut? Hubungi pustakawan institusi ini. |