ENGINEERING DESIGN OF RECONFIGURABLE PIPELINED DATAPATH
| Main Author: | D.PREETHI , G.KEERTHANA , K.RESHMA , Mr.A.RAJA |
|---|---|
| Format: | Article eJournal |
| Terbitan: |
, 2019
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/3600025 |
Daftar Isi:
- Configurable processing has caught the creative mind of numerous draftsmen who need the exhibition of use explicit equipment joined with the re programmability of universally useful PCs. Sadly, Configurable processing has had rather constrained achievement generally on the grounds that the FPGAs on which they are constructed are more fit to executing arbitrary rationale than registering assignments. This paper presents RaPiD, another coarse-grained FPGA engineering that is enhanced for exceptionally monotonous, calculation escalated errands. Extremely profound application-explicit calculation pipelines can be designed in RaPiD. These pipelines make significantly more proficient utilization of silicon than customary FPGAs and furthermore yield a lot better for a wide scope of uses.