Synthesis of 64 Bit Triple Data Encryption Standard Algorithm using VHDL
| Main Authors: | Simran, Parminder Singh Jassal |
|---|---|
| Format: | Article eJournal |
| Bahasa: | eng |
| Terbitan: |
, 2018
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/3582184 |