Fast Fourier Transform on the Versat CGRA
| Main Authors: | D. Lopes, João, T. de Sousa, José |
|---|---|
| Format: | Proceeding Journal |
| Bahasa: | eng |
| Terbitan: |
, 2017
|
| Subjects: | |
| Online Access: |
https://zenodo.org/record/3685577 |
Daftar Isi:
- In this paper we present a Fast Fourier Transform (FFT) algorithm for the Versat architecture, a small and low power Coarse Grained Reconfigurable Array (CGRA). This approach targets ultra low energy applications such as those found in Wireless Sensor Networks (WSNs), where using a GPU or FPGA accelerator is out of the question. The implementation chosen was the Radix-2 FFT, and uses 32-bit integer precision in the Q1.31 format. The Versat program creates two base hardware datapaths for the two basic steps of the algorithm: the complex multiplication and the complex addition steps. These datapaths are partially reconfigured during execution. The program has been written in assembly and has 873 instructions. It is fully parameterizable with the number of datapoints, FFT window size, overlap size and memory pointers for reading and writing back the data to the external memory. The results show that the new Versat core is 9.4x smaller than an ARM Cortex A9 core, runs the algorithm on average 18x faster and consumes 219.51x less energy.