Comparative Analysis of Efficient Designs of D Latch using 32nm CMOS Technology
| Main Authors: | Tanusha Beni Vyas, Shubhash Chandra |
|---|---|
| Format: | Article |
| Bahasa: | eng |
| Terbitan: |
, 2019
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/3591483 |