DESIGN OF A CMOS BANDGAP REFERENCE WITH LOWTEMPERATURE COEFFICIENT AND HIGH POWER SUPPLY REJECTION PERFORMANCE
| Main Authors: | Abhisek Dey, Tarun Kanti Bhattacharyya |
|---|---|
| Format: | Article Journal |
| Terbitan: |
, 2018
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/1298450 |
Daftar Isi:
- A high precision temperature compensated CMOS bandgap reference is presented. The proposed circuit employs current-mode architecture that improves the temperature stability of the output reference voltage as well as the power supply rejection when compared to the conventional voltage-mode bandgap referenc. Using only first order compensation the new architecture can generate an output reference voltage of 550mV with a peak-to-peak variation of 400μV over a wide temperature range from -25oC to +100oC which corresponds to a temperature coefficient of 5.8ppm/oC. The output reference voltage exhibits a variation of 2.4mV for supply voltage ranging from 1.6V to 2.0V at typical process corner. A differential cascaded three-stage operational amplifier is included in the bandgap circuit to improve the power supply rejection of the BGR. Simulation result shows that the power supply rejection ratio of the proposed circuit is 79dB from DC up to 1kHz of frequency. The proposed bandgap reference is implemented using UMC 0.18μm CMOS process and it occupies an active layout area of 0.14mm2.