FPGA IMPLEMENTATION OF PATH TIMING METHOD FOR HARDWARE TROJAN DETECTION
| Main Author: | O.Vignesh*1, H.Mangalam 2, T.Sugunabai3 |
|---|---|
| Format: | Article |
| Terbitan: |
, 2018
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/1230368 |
Daftar Isi:
- Digital Hardware Architecture is widely used in critical applications such as industrial, automotive, medical and military systems. Since FPGA, DSP, GPP are more economical to production of outsource device to off-shore facilities. Malicious modification of hardware during design or fabrication has emerged as a major security concern. Hardware Trojan (HT) are becoming more of a threat to integrated circuits, which is altered the functional behavior and untrusted foundries. This paper aims to analyze the threat posed by hardware Trojan and the methods of deterring them. Hardware Trojan detection method introduces the concept of Side Channel analysis which detects the Trojan by analyzing data path and frequency of Trojan circuit with the Trojan free circuit.