Lokasi: FPGA Implementation of Range Addressable Activation Function for Lattice-Ladder Neuron

Main Authors:	Sledevic, Tomyslav, Navakauskas, Dalius
Format:	Article
Terbitan:	, 2017
Subjects:	Lattice-ladder neuron nonlinear activation function transfer function high-level synthesis fixed-point arithmetic FPGA implementation
Online Access:	https://zenodo.org/record/1121623

https://zenodo.org/record/1121623