Design and Implementation of a 10-bit SAR ADC

Main Authors: Hasmayadi Abdul Majid, Rohana Musa
Format: Article
Bahasa: eng
Terbitan: , 2013
Subjects:
Online Access: https://zenodo.org/record/1088394
Daftar Isi:
  • This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIMOS’s 0.35 μm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and SAR digital logic to create 10 effective bits while consuming less than 7.8 mW with a 3.3 V power supply.