FPGA IMPLEMENTATION OF DIRECT DIGITAL SYNTHESIZERUSING VHDL
| Main Author: | Vidya Sagar Potharaju |
|---|---|
| Format: | Article Journal |
| Terbitan: |
, 2017
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| Subjects: | |
| Online Access: |
https://zenodo.org/record/1067984 |
Daftar Isi:
- Signal generators are heavy and large in size and are limited to particular set of analog wave forms,creation of arbitrary wave forms are not possible. The available Digital signal generators nowadays are incapable of creating all type of waveforms and more ever they are not reconfigurable. In this paper I am proposing an efficient method called Direct Digital Synthesis (DDS) to realize all the hardware parts of signal generator called Direct Digital Synthesizer in FPGA using VHSIC Hardware Description Language (VHDL). DDS has many advantages over its analog counterpart and improved phase noise. It has precise control of the output phase across frequency switching transitions.The output of FPGA will be digital and this digital data is given to Digital-to-Analog Convertor (DAC). DAC converts the digitally created signal to analog form thus creating a versatile, flexible signal generator. The DAC and FPGA share a single clock source. Since we are using FPGA as a hardware part, with simple alteration to FPGA design signal generator upgradation is possible without any additional cost by altering the FPGA design. It is used in all sorts of places such as frequency hopping, signal synthesis, medical imaging systems, radio receivers, Phase Locked Loop (PLL), test equipment