Lokasi: Hybrid Prefix Adder Architecture for Minimizing the Power Delay Product

Main Authors:	P.Ramanathan, P.T.Vanathi
Format:	Article Journal
Bahasa:	eng
Terbitan:	, 2009
Subjects:	Parallel Prefix Adder (PPA) Dot operator Semi-Dotoperator Complementary Metal Oxide Semiconductor (CMOS) Odd-dot operator Even-dot operator Odd-semi-dot operator andEven-semi-dot operator
Online Access:	https://zenodo.org/record/1060741

Koleksi	Cognizance Journal of Multidisciplinary Studies
Gedung	Cognizance Journal of Multidisciplinary Studies
Institusi	ZAIN Publications
Kota	Stockholm
Provinsi	INTERNASIONAL
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