Noise Optimization Techniques for 1V 1GHz CMOS Low-Noise Amplifiers Design
| Main Authors: | M. Zamin Khan, Yanjie Wang, R. Raut |
|---|---|
| Format: | Article |
| Bahasa: | eng |
| Terbitan: |
, 2007
|
| Online Access: |
https://zenodo.org/record/1059347 |
Daftar Isi:
- A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology.With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.