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Sudarshan Tiwari
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Title
NEW DESIGN METHODOLOGIES FOR HIGH-SPEED MIXED-MODE CMOS FULL ADDER CIRCUITS
Article
oleh
Subodh Wairya
,
Rajendra Kumar Nagaria
,
Sudarshan
Tiwari
Terbitan:
2011
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Tersimpan di:
DESIGN & ANALYSIS OF A CHARGE RE-CYCLE BASED NOVEL LPHS ADIABATIC LOGIC CIRCUITS FOR LOW POWER APPLICATIONS
Article
eJournal
oleh
Sanjeev Rai
,
Govind Krishna Pal
,
Ram Awadh Mishra
,
Sudarshan
Tiwari
Terbitan:
2012
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Related Subjects
Adiabatic logic
Bridge full adder
Current mode logic
Diode based logic
Dynamic circuits
Energy recovery
Full adder
Hybrid XOR-XNOR circuit
LPHS (Low Power High Speed)
Low-power
MOSCAP
Majority-Not gate
Power Delay Product (PDP)
Power-delay product (PDP)
Split-level
Two phase clocked
Very Large Scale Integrated (VLSI) Circuits
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