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Palepu Mohan Radha Devi
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Title
DESIGN OF HIGH SPEED FIR FILTER ON FPGA BY USING MULTIPLEXER ARRAY OPTIMIZATION IN DA-OBC ALGORITHM
Article
Journal
oleh
Palepu
Mohan
Radha
Devi
,
Vijay Kumar Chenchela
,
Palepu Vijayasanthi
,
Nellore Kapileswar
Terbitan:
2016
Available online:
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Tersimpan di:
IMPROVING THE LIFESPAN OF WIRELESS SENSOR NETWORKS VIA EFFICIENT CARRIER SENSING SCHEME-CSMA/SDF
Article
oleh
Nellore Kapileswar
,
Palepu Vijayasanthi
,
Palepu
Mohan
Radha
Devi
,
Vijay Kumar Chenchela
Terbitan:
2016
Available online:
Get online
Favorit
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Related Subjects
: FPGA
Booth Multiplexer Array
CSMA/CA
CSMA/SDF
DA
DA-OBC ALGORITHIM
FIR Filter
Medium access control
Network lifetime
Wireless Sensor Networks
sensor nodes
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