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El Ansari Abdessamad
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An energy-aware system-on-chip architecture for intra prediction in HEVC standard
Article
oleh
El
Ansari
Abdessamad
,
Anas Mansouri
,
Ali Ahaitouf
Terbitan:
2019
Available online:
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Area and power efficient VLSI architecture of mode decision in integer motion estimation for HEVC video coding standard
Article
oleh
El
Ansari
Abdessamad
,
Nejmeddine Bahri
,
Anass Mansouri
,
Nouri Masmoud
,
Ahaitouf Ali
Terbitan:
2019
Available online:
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Related Subjects
HEVC
FPGA
Hardware
Integer Motion Estimation (IME)
Intra prediction
Real time processing
Sum Absolute of the Difference (SAD)
Very-Large-Scale Integration (VLSI) architecture
Video coding
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