Teymourzadeh, R. (2011). FPGA Implementation of pipeline Digit-Slicing Multiplier-Less Radix 2 power of 2 DIF SDF Butterfly for Fourier Transform Structure.
Chicago Style CitationTeymourzadeh, Rozita. FPGA Implementation of Pipeline Digit-Slicing Multiplier-Less Radix 2 Power of 2 DIF SDF Butterfly for Fourier Transform Structure. 2011.
MLA CitationTeymourzadeh, Rozita. FPGA Implementation of Pipeline Digit-Slicing Multiplier-Less Radix 2 Power of 2 DIF SDF Butterfly for Fourier Transform Structure. 2011.
Warning: These citations may not always be 100% accurate.