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Design and Implementation of Low Power High Speed 32-Bit HCSA

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Main Authors: Yogayata Shrivastava, Tarun Verma, Rita Jain
Format: Article
Terbitan: , 2014
Subjects:
Arithmetic logic unit (ALU)
Configurable Logic Blocks (CLB)
Carry Select Adder (CSLA)
Field Programmable Gate Array (FPGA)
High-speed carry select adder (HCSA)
Look up-tables (LUT)
Ripple carry adder (RCA)
Online Access: https://zenodo.org/record/33236
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Internet

https://zenodo.org/record/33236

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