Lihat Juga

• Design and Analysis of an 8T Read Decoupled Dual Port SRAM Cell for Low Power High Speed Applications
  oleh: Ankit Mitra
  Terbitan: (2014)
• Design and Development of a Low Power High-Speed Hybrid Full Adder
  oleh: Arcot S. Keshav, et al.
  Terbitan: (2022)
• High-Performance Design of a 4-Bit Carry Look-Ahead Adder in Static CMOS Logic
  oleh: Hasan, Mehedi; University of Science and Technology Chittagong, et al.
  Terbitan: (2020)
• PERFORMANCE ANALYSIS OF LOW POWER FULL ADDER CELLS USING 45NM CMOS TECHNOLOGY
  oleh: K.Dhanunjaya, et al.
  Terbitan: (2015)
• A High Speed Low Power Adder in Dynamic Logic base on Transmission Gate
  oleh: Neeraj Jain, et al.
  Terbitan: (2015)