Mirmotahari, O. (2007). Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks.
Chicago Style CitationMirmotahari, Omid. Proposal for a Ultra Low Voltage NAND Gate to Withstand Power Analysis Attacks. 2007.
MLA CitationMirmotahari, Omid. Proposal for a Ultra Low Voltage NAND Gate to Withstand Power Analysis Attacks. 2007.
Warning: These citations may not always be 100% accurate.